====== Un semplice Makefile ======
Viene proposto un semplice Makefile da utilizzare per fare esperimenti e "giocare" con la sintassi accettata dal comando ''make''.
==== Versione base ====
#
# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND.
# Massimo Torquati
#
CC = gcc
CFLAGS += -std=c99 -Wall -Werror
INCLUDES = -I.
OPTFLAGS = -g #-O3
.PHONY: all clean cleanall
TARGETS = macro1 macro2
all : $(TARGETS)
macro1 : macro1.c
macro2 : macro2.c
clean :
-rm -f $(TARGETS)
==== Versione leggermente piĆ¹ complessa ====
#
# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND.
# Massimo Torquati
#
CC = gcc
CFLAGS += -std=c99 -Wall -Werror
INCLUDES = -I.
OPTFLAGS = -g #-O3
#LDFLAGS = -L.
#LIBS = -pthread
#AR = ar
#ARFLAGS = rvs
# These are my targets, add yours here.
TARGETS = test1 \
test2
.PHONY: all clean cleanall
# for documentation on Pattern Rules take a look at:
# https://www.gnu.org/software/make/manual/html_node/Pattern-Rules.html
# pattern rule, it produces the executable 'prog' from 'prog'.c
%: %.c
$(CC) $(CFLAGS) $(INCLUDES) $(OPTFLAGS) -o $@ $< $(LDFLAGS)
# pattern rule, it produces an object file 'prog'.o from 'prog'.c
%.o: %.c
$(CC) $(CFLAGS) $(INCLUDES) $(OPTFLAGS) -c -o $@ $<
# this is the first target rule encountered when typing make without any args
all : $(TARGETS)
clean :
-rm -f $(TARGETS)
cleanall : clean
-rm -f *.o *~ *.a